Responsibilities:

Research, design, develop and test hardware components of low-latency trading platform for use by proprietary trading firm, including improving and adapting field-programmable gate array (FPGA) designs. Design and develop complex systems to accelerate processing of data streams in terms of latency and throughput, including designing proofs of concept for new architecture using Verilog and SystemVerilog and developing implementation strategies incorporating multiple FPGA vendors. Work closely with Development, Performance Engineering (IT), and Trading teams to build an innovative cutting-edge trading platform that leverages state-of-the-art hardware design. Design and develop embedded software to improve integration with hardware architecture using C, C++ and Assembly to reduce latency of trading system. Manage the multi-vendor FPGA build, test and deployment process flow, including performing system-level verification, validation, deployment and support using third-party toolsets including Altera and Xilinx.

Education and Experience Required:

• MS in electrical engineering, computer engineering, or computer science

• One (1) year of experience in FPGA engineering

• Must have work experience with each of the following: 1) Designing proofs of concept for new architecture using Verilog and SystemVerilog and developing implementation strategies incorporating multiple FPGA vendors; 2) Performing system-level verification, validation, deployment and support using third-party toolsets including Altera and Xilinx; and 3) Designing and developing embedded software to improve integration with hardware architecture using C, C++ and Assembly.

In lieu of MS degree plus one (1) year of experience, will also accept a BS degree plus five (5) years of experience in the same fields.