Top Design Engineer Jobs in Chicago, IL

Design and develop silicon photonics integrated circuits, driving architecture, product definition, and optimizing performance for optical systems while leading cross-functional collaboration.

As an Opto-Electronic Mechanical Development Engineer, you'll develop mechanical designs, perform analyses, collaborate with teams, and ensure product reliability.

Design high-speed integrated photonic components, implement designs through fabrication, and test circuits for performance verification. Requires strong optical and semiconductor device knowledge.

Remote 12-month contract RTL Design Engineer to own micro-architecture and RTL implementation for complex digital blocks. Requires SystemVerilog/Verilog expertise, memory controller and SoC integration experience, IP integration, multi-clock-domain design, and sign-off familiarity (CDC/RDC/lint/synthesis). Works independently and collaborates with DV for closure and debug.

Develop electrical design packages for pipeline projects, producing calculations, drawings, and documentation. Lead discipline-specific designs on smaller projects and assist technical analysis on complex projects. Coordinate with project teams, perform QA/QC reviews, use CAD and engineering tools, communicate impacts to scope/cost/schedule/quality, and occasionally support field activities.

As the Principal DCIM Design Engineer, you will lead design standards for data center infrastructure, manage teams, develop control systems, and ensure scalable solutions are in place for QTS's global infrastructure.

The Substation Design Engineer III will design electrical substations, provide technical expertise, prepare engineering documents, and ensure project timelines and budgets are met.

Lead implementation of the marketing website in Webflow and code, translating Figma into semantic, accessible, performant pages and reusable components. Build Web Components and vanilla JS modules, optimize Core Web Vitals, ensure accessibility (WCAG), contribute to Next.js apps, QA experiments, and establish front-end standards and patterns.

Technical lead for electro-mechanical actuator design and development for aerospace platforms. Own system architecture, component design, testing, validation, and lifecycle activities while coordinating suppliers, manufacturing, and customers to meet program milestones and producibility requirements.

The Lead RTL/FPGA Design Engineer will develop and manage high-performance coherent modems for free space optical communications, translating DSP algorithms into synthesizable RTL, ensuring compliance, and supporting integration and testing.

Seeking a Senior Physical Design Engineer with expertise in chip-level implementation, EDA tools, and low-power design to enhance AI hardware capabilities.

The Mechanical Engineer - Hydronics will own the hydronic distribution architecture for modular data centers, focusing on design, commissioning, and serviceability of liquid-cooled systems.

Lead Solutions Design Engineer develops and wins supply chain and warehousing solutions by designing optimized transportation and warehouse networks, modeling scenarios, validating data, calculating labor/equipment costs, producing proposals, supporting pursuits and startups, mentoring small teams, and ensuring designs transition successfully into operations.

Lead the design and implementation of enterprise WiFi solutions for Air Force bases using Ekahau. Perform site surveys, create heat maps and coverage models, select and configure hardware, test and optimize RF performance, document designs, troubleshoot complex issues, and support deployments. Provide technical collaboration with stakeholders and ensure wireless security and compliance for mission-critical environments.

Lead a traffic engineering design team for interstate and arterial projects, overseeing signing/marking, ITS, signal, tolling, and intersection design from concept through delivery; manage scope, schedule, budget, quality assurance, client engagement, mentoring, and business development.

The Desktop/Workstation Design Engineer will design and implement desktop OS images, manage software deployment, support OS patching, and ensure hardware integration.

The Signal Integrity Engineer will simulate high-speed PCB channels, provide guidance to designers, and design test boards. Requires extensive experience in SerDes simulation.

Design and deliver die-to-die chiplet PHY IP in advanced FinFET nodes: develop PLLs and AMS blocks, lead design verification and layout interactions, support tape-out and silicon bring-up, and collaborate across architecture, digital, verification, layout, and software teams to achieve production-quality silicon.

The Analog Design Engineer is responsible for designing complex analog circuits, verifying performance, and collaborating with cross-functional teams to enhance efficiencies and provide training.

Lead architecture, design, fabrication, testing, and optimization of silicon photonics integrated circuits for coherent long-haul, metro, and pluggable optical systems. Drive PIC specification, link-budget analysis, DFM/DFT practices, cross-functional execution with RFIC/DSP/packaging/foundry partners, and establish simulation and test infrastructures for scalable, high-yield production.

The Electrical Design Engineer will design building electrical systems, primarily for healthcare projects, while ensuring compliance with codes and standards. Responsibilities include system design, project coordination, and technical reporting, with opportunities for growth into leadership roles.

Collaborate on mechanical designs for data center systems, validating performance, overseeing construction, and ensuring designs meet quality benchmarks.

Design and analyze high-speed analog/mixed-signal circuits including ADCs, DACs, and PLLs in advanced CMOS technologies. Engage in layout optimization and testing plans.

Lead ASIC package architecture and detailed FC-BGA/MCM package designs for high-pin-count, high-speed, power-dense SoCs. Drive package trade studies (SI/PI, thermal, manufacturability, reliability), define standards, collaborate with silicon/RF/systems teams, work with OSATs and substrate vendors, and support qualification and production ramp.

Lead end-to-end RTL-to-GDSII physical design for high-performance SoCs in advanced FinFET nodes. Own synthesis, floorplanning, P&R, CTS, STA, DRC/LVS and sign-off; develop methodologies and automation to optimize PPA; drive timing closure, coordinate package/SI/PI and DFT, manage external PD partners and EDA tool flows, and support post-silicon bring-up and production for spaceflight-qualified designs.