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Top FPGA Engineer Jobs in Chicago, IL

Simplex Trading Logo
Simplex Trading

FPGA Engineer

Reposted 22 Days AgoSaved
In-Office
Chicago, IL
125K-200K Annually
Mid level
125K-200K Annually
Mid level
Fintech • Software
The FPGA Engineer will design FPGA logic for trading, analyze results, and work on developing low-latency applications and timing closure.
Top Skills: Verilog,System Verilog,Python
Optiver Logo
Optiver

FPGA Engineer

Reposted 5 Days AgoSaved
In-Office
Chicago, IL
200K-200K Annually
Junior
200K-200K Annually
Junior
Fintech • Quantitative Trading
As an FPGA Engineer, you will design and implement high-speed hardware for trading systems, collaborate with traders and developers, and advance low-latency techniques.
Top Skills: CC++SystemverilogVerilogVhdl
Chicago Trading Company Logo
Chicago Trading Company

Senior FPGA Engineer

Reposted 7 Days AgoSaved
Easy Apply
In-Office
Chicago, IL
Easy Apply
225K-250K Annually
Senior level
225K-250K Annually
Senior level
Financial Services
The Senior FPGA Engineer will design, implement, and improve ultra-low-latency trading systems, collaborating with various teams to enhance performance and scalability.
Top Skills: C++FpgaPythonSystemverilogVhdl
Qube Research & Technologies Logo
Qube Research & Technologies

FPGA Engineer

Reposted 12 Days AgoSaved
Easy Apply
In-Office
Chicago, IL
Easy Apply
180K-280K Annually
Mid level
180K-280K Annually
Mid level
Financial Services
Join QRT as an FPGA Engineer, developing RTL for hardware platforms to accelerate high frequency trading. Work closely with trading teams to optimize solutions.
Top Skills: C/C++FpgaPythonRtl
Ursa Major Logo
Ursa Major

Senior FPGA Verification Engineer

Reposted 11 Days AgoSaved
Remote
Chicago, IL
120K-150K Annually
Senior level
120K-150K Annually
Senior level
Aerospace • Defense
As a Senior FPGA Verification Engineer, you will architect and develop test benches, verify code functionality, and prepare design review materials.
Top Skills: CocotbPythonQuestasimRiviero-ProSystemverilogUvmVcsVerilatorVerilogVhdl
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