Monitor and support Quantiq's live trading environment during APAC/European sessions, analyze markets and news, calculate daily P&L and positions, troubleshoot production issues with engineering, support algorithm releases, develop automation tools and convert manual processes to automated systems.

Design, optimize, and maintain low-latency FPGA-based network infrastructure. Develop Verilog/VHDL/SystemVerilog modules, write high-performance C/C++ network drivers, debug and profile systems, document architecture and optimizations, and improve overall system performance.

Develop and maintain hardware and low-level software across the network stack, from FPGA NIC packet processing and PCIe crossings to kernel socket engineering. Write and debug high-performance Verilog/SystemVerilog/VHDL and C/C++ code, evaluate system performance, test large datasets, collaborate with Ops and Technical teams, and manage project releases.