Top Tech Jobs & Startup Jobs in Chicago, IL

Develop and implement test plans for coherent optical pluggable products using Photonics Integrated Circuits. Analyze transceiver performance, define testability requirements, validate test platforms, and collaborate with development and manufacturing teams. Support fault isolation, integrate platform changes into manufacturing, and improve test yield and cycle times through data analytics and statistical modeling.

Develop, optimize, and integrate 5G NR L2/L3 protocol stacks (MAC, RLC, PDCP, RRC, NGAP). Implement scheduling, HARQ, buffer management, and mobility features. Debug protocols using tracing tools and integrate L2/L3 with PHY and 5GC to improve throughput, latency, and handover performance.

Develop and optimize UE Layer 2 and Layer 3 protocol stack (MAC, RLC, PDCP, RRC, NAS) for LTE and 5G NR. Implement 3GPP features, debug with protocol analyzers, integrate with PHY/L1, run functional and performance tests using UE simulators and network emulators, and ensure operator compliance.

Design, develop, and optimize platform-level embedded software and reusable frameworks for telecom products (including 5G). Collaborate across systems teams, perform architecture and code reviews, support integrations with customers/partners, and mentor engineers while ensuring performance, scalability, and reliability on heterogeneous processors.

Leads end-to-end customer success programs and operational services for hyperscale customers. Manages cross-functional global teams, technical escalations, deployments, upgrades, quality initiatives, risks, budgets, contracts, schedules, and customer communications. Coordinates engineering, support, product, quality, supply chain, logistics, sales, and account teams to resolve issues, improve reliability, meet contractual commitments, and drive customer satisfaction and commercial performance.

Manages complex customer projects and programs from initiation through delivery, care, and closure. Responsibilities include planning, change and risk management, contract and financial oversight, quality control, stakeholder communication, customer relationship management, team leadership, operational handoffs, KPI reporting, and identifying opportunities for contract expansion and renewal.

Sustain and improve PIC wafer fabrication through metrology, process characterization, defect analysis, and process control. Develop and maintain metrology recipes, sampling plans, and inline monitoring strategies; analyze data and SPC excursions; support failure analysis, equipment qualification, troubleshooting, documentation, operator training, technology transfers, and production ramps. Collaborate with process integration, manufacturing, equipment engineering, R&D, operations, and external analysis teams to improve yield, quality, and manufacturing performance.

Provides technical cybersecurity compliance and risk assessment support for product vulnerabilities, CVEs, security incidents, and remediation activities. Evaluates customer and regulatory impact, supports National Security Agreement reviews, assists with government notifications and audits, and maintains technical compliance documentation. Acts as a liaison between Product Security, Engineering, Vulnerability Management, and the National Security Office while translating complex technical information into actionable business and regulatory assessments.

Design, simulate, analyze, and productionize high-speed analog and mixed-signal circuits, including ADCs, DACs, PLLs, and SERDES in advanced CMOS technologies. Develop optimized layout floor plans, guide layout engineers, evaluate topology trade-offs, create analog testing plans, and collaborate with process and test engineering teams to characterize products. Support design methodologies, release flows, behavioral modeling, and circuit analysis.

Design, implement, simulate, and bring to production high-speed analog/mixed-signal circuits (ADCs, DACs, PLLs, SERDES) in advanced CMOS FinFET. Create and supervise layout, evaluate topology trade-offs for power/area/linearity/bandwidth, develop test plans with PE/TE teams, and follow team design methodologies and release flows.